1. Field of the Invention
This disclosure presents a method of manufacturing a fin-type field effect transistor (FinFET), which uses a three-mask method of constructing the final hard mask used for etching the silicon fins, the source/drain silicon regions, and silicon mesas for non-FinFET devices such as resistors, diodes, and capacitors.
2. Description of the Related Art
As the need to decrease the size of transistors continues, new and smaller types of transistors are created. One recent advance in transistor technology is the introduction of fin type field effect transistors that are known as FinFETs. U.S. Pat. No. 6,413,802 to Hu et al. (hereinafter “Hu”), which is incorporated herein by reference, discloses a FinFET structure that includes a center fin that has a channel along its center and source and drains at the ends of the fin structure. A gate conductor covers the channel portion.
While FinFETs structures reduce the size of transistor based devices, it is still important to continue to improve FinFETs and methods of manufacturing FinFETs. The invention described below uses a three-mask method of constructing the final hard mask used for etching the silicon fins, and the source/drain silicon regions for FinFETS, and silicon mesas for non-FinFET devices such as resistors, diodes, and capacitors.